Part of the DoW SBIR/STTR FY27 Release 2 topic list. Browse all 83 topics by industry or service.
Topic DON27BZ02-DV029 from the DoW SBIR 2027 BAA, Release 2. Pre-release now; proposals due January 6, 2027, 12:00 PM ET.
Quick answer
DON27BZ02-DV029 is a Department of the Navy Direct-to-Phase II SBIR topic from the MIDS Program Office seeking a modular software reference implementation of a government-specified tactical waveform on a Digital Transceiver, moving away from legacy FPGA-based designs. Applicants must document feasibility instead of receiving a Phase I award. Proposals are due January 6, 2027, 12:00 PM ET.
Solicitation at a glance
- Topic number: DON27BZ02-DV029
- Official title: DIRECT TO PHASE II: Modular Software Reference Implementation for Waveforms
- Agency: Department of the Navy
- Program: SBIR (DoW SBIR 2027 BAA, Release 2)
- Award type: Direct to Phase II (no Phase I awards)
- Award amount: Base up to $750,000 (18 months) plus an option up to $1,000,000 (24 months); the option requires 1:1 matching non-SBIR funds. Source: Navy Release 2 instructions in DSIP.
- CMMC level: Level 2 (Self)
- ITAR: Yes. Export-controlled (ITAR/EAR); see topic text
- Technology areas: None
- Pre-release (direct TPOC contact allowed): November 4 to December 2, 2026, 8:00 AM ET
- Opens in DSIP: December 2, 2026, 8:00 AM ET
- Proposals due: January 6, 2027, 12:00 PM ET
- Official source: DSIP Topics app (search DON27BZ02-DV029)
BW&CO's take
What the Department of the Navy wants
Tactical data link waveforms have traditionally been hosted on FPGAs, which brings long synthesis, place-and-route, and timing-closure cycles. The MIDS Program Office wants to move to a modular open systems architecture where software-defined waveforms written in high-order languages run on heterogeneous processors, offloading heavy PHY tasks like FFTs, FEC, and matrix math to GPUs, NPUs, or adaptive SoCs. In Phase II, the performer builds a real-time software physical layer for the government-specified waveform using a Digital Transceiver SDK, ports it to the transceiver's processing core, conducts over-the-air or over-the-wire RF testing, and runs a government-approved acceptance test campaign covering communication limits, latency, and spectral compliance.
Who is a good fit
- A track record building hardware-agnostic software waveforms in C/C++ for multi-core CPUs, GPUs, and NPUs
- Experience scaling waveform software from server environments down to constrained tactical radio form factors
- Working knowledge of the interoperability standards for the relevant military waveform family
- High-throughput FEC, FFT, and vectorized DSP implementations with measured real-time performance
Watch-outs
- This is Direct-to-Phase II: tangible proof of feasibility is an absolute prerequisite, backed by modeling, simulation, physical experimentation, and a technical risk map, and it must not rely exclusively on prior or active federally funded SBIR/STTR contracts.
- Phase II work may become classified. The company must be U.S. owned and operated with no foreign influence (unless DCSA-approved mitigation is in place) and able to acquire and maintain a secret level facility and personnel security clearances.
- The topic metadata marks it as ITAR-restricted, which generally limits foreign national participation.
- The topic metadata lists CMMC Level 2 (Self).
Think your company fits DON27BZ02-DV029? Talk with BW&CO before the January 6 deadline.
Plan Your DON27BZ02-DV029 Submission
Official topic text (verbatim from DSIP)
The text in this section is copied word for word from the official DSIP topic as published on November 4, 2026. DSIP is the official source and topics can be amended. Always confirm the current version at dodsbirsttr.mil before you submit. Our commentary above is BW&CO's interpretation, not Government guidance.
Title
DIRECT TO PHASE II: Modular Software Reference Implementation for Waveforms
Objective
Develop and demonstrate a modular software reference implementation of a government-specified tactical waveform on a Digital Transceiver to establish an open architecture that leverages novel processing to transition from legacy Field-Programmable Gate Array (FPGA)-based systems.
Description
The Multifunctional Information Distribution System (MIDS) Program Office (PMA/PMW-101) is driving a critical architectural pivot in tactical data link (TDL) communications. Historically, the defense sector has relied heavily on FPGAs to host complex tactical waveforms due to strict RF timing constraints. However, as noted in recent software-defined radio (SDR) surveys, this hardware-centric approach suffers from severe developmental friction [Ref 1]. Programming FPGAs via Hardware Description Languages (HDL) requires lengthy synthesis, complex place-and-route cycles, and difficult timing closures. Because software compilation bypasses these physical routing and synthesis barriers, transitioning from HDL to high-order software languages (C/C++) on general-purpose architectures typically reduces development timelines by 50% to 80%—compressing multi-year hardware upgrade cycles into a matter of months.
To overcome legacy constraints, this initiative mandates a transition toward a modular open systems architecture (MOSA). By decoupling the physical layer (PHY) from the underlying hardware, containerized Software-Defined Waveforms (SDWs) can be deployed across modern processing. Because standard Central Processing Units (CPUs) often lack the deterministic throughput required for heavy RF pipelines, modern SDR frameworks dynamically offload computationally intensive PHY tasks to coprocessors like GPUs, Neural Processing Units (NPUs), or adaptive System-on-Chips (SoCs).
This heterogeneous approach enables the execution of highly parallel mathematical pipelines via software Application Programming Interfaces (APIs), including:
Vectorized Signal Processing on GPUs or NPU cores:
- Executing Fast Fourier Transforms (FFTs)
- High-throughput Forward Error Correction (FEC)
- Matrix Multiplications
AI-Driven Cognitive Radio: As demonstrated by O'Shea and Hoydis [Ref 2], traditional heuristic PHY blocks can be replaced by "neural receivers" and deep learning autoencoders. By reusing embedded AI inference blocks, radios can perform real-time channel estimation, signal classification, and non-linear error correction at the tactical edge.
By migrating to this software-first model, the Navy ensures rapid portability across joint-force platforms to provide highly scalable parallelism, allowing waveforms and AI-enhanced microservices to execute, reconfigure, and recover dynamically, ensuring maximum resiliency in contested electronic warfare environments.
Work produced in Phase II may become classified. Note: The prospective contractor(s) must be U.S. owned and operated with no foreign influence as defined by 32 U.S.C. § 2004.20 et seq., National Industrial Security Program Executive Agent and Operating Manual, unless acceptable mitigating procedures can and have been implemented and approved by the Defense Counterintelligence and Security Agency (DCSA) formerly Defense Security Service (DSS). The selected contractor and/or subcontractor must be able to acquire and maintain a secret level facility and Personnel Security Clearances. This will allow contractor personnel to perform on advanced phases of this project as set forth by DCSA and NAVWAR in order to gain access to classified information pertaining to the national defense of the United States and its allies; this will be an inherent requirement. The selected company will be required to safeguard classified material during the advanced phases of this contract IAW the National Industrial Security Program Operating Manual (NISPOM), which can be found at Title 32, Part 2004.20 of the Code of Federal Regulations.
Phase I
For a Direct to Phase II topic, the Government expects that the small business will have accomplished the following in a Phase I-type effort and developed a concept for a workable prototype or design to address, at a minimum, the basic requirements of the stated objective above. The following actions would be required to satisfy the requirements of Phase I:
Crucially, the evidence of this foundational research MUST NOT rely exclusively on previous or active federally funded SBIR/STTR contracts. Tangible proof of feasibility is an absolute prerequisite for award consideration.
To satisfy these Phase I prerequisites, the submitted documentation must substantiate that the offeror has successfully executed the following:
Validation of Feasibility: Comprehensive preliminary research into the development, integration, and demonstration of software-defined waveforms. This must be backed by empirical evidence, including theoretical modeling, simulation results, physical experimentation, and a clear mapping of anticipated technical risks.
Proven Engineering Capabilities: A documented track record in advanced digital signal processing (DSP) and the engineering of modular, hardware-agnostic software waveforms. Offerors must detail their practical experience in optimizing these waveforms for modern, heterogeneous compute environments—specifically multi-core CPUs, GPUs, and NPUs—and demonstrate scalability from enterprise server environments down to constrained tactical radio form factors.
Standardization and Interoperability: A deep, working knowledge of the governing interoperability standards for the specified military waveform family, ensuring the firm is fully equipped to engineer the required operational variants.
Phase II
Design, develop, and integrate a real-time, software-defined physical layer implementation of the government-specified waveform utilizing a Digital Transceiver Software Development Kit (SDK). Validate that the Domain-Specific Architecture (DSA) processing core on the transceiver can natively host the specified waveform family, verifying the performance, agility, and modularity advantages of a software-defined physical layer.
- Architectural Integration: Port and optimize the modular waveform software to run directly on the transceiver's processing core, maximizing instruction-set efficiency and parallel execution.
- Spectral Verification: Conduct over-the-air or over-the-wire RF transmission testing of the waveform using the transceiver SDK test set.
- Performance Acceptance: Execute a comprehensive, multi-point validation campaign in accordance with a government-approved acceptance test plan to confirm functional communication limits, latency, and spectral compliance.
Work in Phase II may become classified. Please see note in the Description.
Phase III Dual Use Applications
Complete operational testing, interoperability verification against the government reference waveform, and transition the waveform baseline for deployment on MIDS Joint Tactical Radio System (JTRS) and other approved tactical radio platforms via the government’s accredited integration and release pipeline.
Commercial organizations increasingly require the ability to rapidly deploy, update, and scale high-performance wireless communications without relying on inflexible, proprietary hardware. Technologies developed under this topic may have broad applicability in 5G/6G telecommunications (Virtualized Radio Access Networks), commercial satellite communications (SATCOM), Non-Terrestrial Networks (NTN), private enterprise networks, emergency responder communications, autonomous vehicle networks, and industrial Internet of Things (IIoT) infrastructure.
References
Sohrabizadeh, A., Bai, Y., Sun, Y., and Cong, J. “Automated Accelerator Optimization Aided by Graph Neural Networks.” Proceedings of the 2022 ACM International Conference on Supercomputing, 2022, pp. 55–60. doi: 10.1145/3489517.3530409. https://www.researchgate.net/publication/356294098_GNN-DSE_Automated_Accelerator_Optimization_Aided_by_Graph_Neural_Networks
O'Shea, T. and Hoydis, J. "An Introduction to Deep Learning for the Physical Layer." IEEE Transactions on Cognitive Communications and Networking, vol. 3, no. 4, December 2017, pp. 563-575. https://ieeexplore.ieee.org/document/8054694
“National Industrial Security Program Executive Agent and Operating Manual (NISP), 32 U.S.C. § 2004.20 et seq. 1993.”. https://www.ecfr.gov/current/title-32/subtitle-B/chapter-XX/part-2004
Keywords
Software-Defined Waveform; SDW; Modular Open Systems Approach; MOSA;, Forward Error Correction; FEC; Signal Processing; Vector Processor
Frequently asked questions
What is DON27BZ02-DV029?
It is a Department of the Navy SBIR topic to develop and demonstrate a modular software reference implementation of a government-specified tactical waveform on a Digital Transceiver, establishing an open architecture that transitions away from legacy FPGA-based systems.
When is DON27BZ02-DV029 due?
Proposals are due January 6, 2027, 12:00 PM ET. DSIP pre-release began November 4, 2026, and direct contact with the topic authors is allowed only until the topic opens on December 2, 2026, 8:00 AM ET.
Is this a Phase I or Direct-to-Phase II topic?
It is Direct-to-Phase II. Offerors must document completed feasibility work, proven engineering capability, and working knowledge of the waveform family's interoperability standards, and this evidence must not rely exclusively on prior or active federally funded SBIR/STTR contracts.
Where does the waveform go after Phase II?
Phase III covers operational testing, interoperability verification against the government reference waveform, and transition of the waveform baseline for deployment on MIDS JTRS and other approved tactical radio platforms through the government's accredited integration and release pipeline.