DAF26BZ05-DV030: High Temp Semiconductor Transistors for Hot DoW Environments and Electronic Warfare
Below is a brief summary. Please check the full solicitation before applying (link in resources section).
Quick Answer
The Department of the Air Force is offering a Direct-to-Phase-II SBIR award of up to $2,000,000 for companies developing semiconductor transistors that can operate reliably at 500°C or higher for defense hot environments and electronic warfare applications. This is topic DAF26BZ05-DV030 under the DoW FY26 SBIR BAA Release 5. There is no Phase I award for this topic. Proposals are due September 23, 2026 through DSIP.
What This Solicitation Is
This is a Direct-to-Phase-II (D2P2) topic, meaning the government skips Phase I entirely and moves straight to Phase II funding under 15 U.S.C. 638(cc). Applicants must already have completed feasibility work on their own, using resources other than federal SBIR or STTR funding, and document that work as part of the Phase II proposal.
The topic falls under the Scaled Hypersonics critical technology area and touches Hypersonics, Microelectronics, Advanced Materials, Directed Energy, and Advanced Computing and Software as component priority areas. It carries a projected CMMC Level 2 (Self) cybersecurity requirement and is restricted under ITAR and EAR export control regulations, so any use of foreign nationals must be disclosed in detail.
What DAF Is Looking For
Today's commercial-off-the-shelf electronics cap out around 250°C, with limited transistor count and performance. Military systems increasingly generate and operate under heat loads that exceed that ceiling, both from the environment and from waste heat generated inside platforms. DAF wants semiconductor device and circuit solutions that push operation up to 500°C or higher to close that gap.
Applicants need a clearly identified DoW hot environment or electronic warfare application with a credible transition path into the microelectronics defense industrial base. DAF has a stated preference for solutions that target an electronic warfare application while using underlying device and circuit technology adaptable to a broader set of DoW high temperature needs, so companies with a flexible platform rather than a single-use design have an edge.
The technical work spans circuit design, semiconductor device design, fabrication, and device characterization. Circuit design needs to derive device performance metrics from 100 to 1,000 transistor count building blocks that scale toward future integrated circuits in the 5,000 to 100,000 transistor range. The desired operating temperature is 500°C or above, with a minimum operating frequency of 1MHz and a target of 10MHz, higher preferred. Solutions that realize complementary transistor circuit topologies, meaning two transistor types with opposite threshold voltage polarity and carrier type, are preferred since that supports standard industry circuit design practices.
Device failure analysis matters here too. DAF wants to see structural, chemical, and electrical characterization work, such as cross-sectional SEM imaging, spatially resolved energy dispersive X-ray spectroscopy, or temperature-soak in-situ electrical testing, though these are examples rather than strict requirements. Applicants should propose and justify whatever specific techniques fit their approach.
The proposed technology should sit at TRL 3 at the start of the project, meaning analytical and experimental proof-of-concept has already been demonstrated in prior work, and reach TRL 5 by the end of Phase II, meaning component validation in a relevant environment through actual high temperature device testing.
Funding and Timeline
Award maximum is $2,000,000 with a maximum period of performance of 24 months. Proposals exceeding either figure will not be considered. The technical volume page limit is 35 pages.
On top of the award, DAF provides up to $50,000 in Technical and Business Assistance funding per Phase II award, splittable 50/50 across a first and sequential award. Any TABA request needs a full written breakdown of the provider, their qualifications, tasks, and cost. A bare dollar figure in the cost volume without that detail will not be considered.
Proposals are due September 23, 2026 through DSIP. DAF anticipates evaluation and selection within roughly 90 calendar days of solicitation close.
Who Should Apply
This topic fits companies with real bench-level or experimentally benchmarked modeling data on high temperature semiconductor devices, ideally with wide bandgap material experience such as silicon carbide or gallium nitride, who already have a specific DoW hot environment or electronic warfare application identified and a named or credible transition partner. Early-stage material science work without device-level performance data will struggle to meet the feasibility bar, since there is no Phase I runway to develop that evidence within this mechanism.
Eligibility and Compliance Notes
At least two thirds of the research effort must be performed by the awardee, measured by direct and indirect costs. All research and development work must happen in the United States, with rare exceptions requiring written approval from the funding agreement officer at the time of initial submission.
Small businesses majority owned by multiple venture capital operating companies, hedge funds, or private equity funds are not eligible to submit or receive awards under this BAA release.
The principal investigator's primary employment must be with the applicant company at time of award and throughout the period of performance, meaning more than half their working time. Only one PI can be designated per proposal.
DAF also runs a foreign risk evaluation and due diligence review on every proposal under 15 U.S.C. 638(vv), covering foreign ownership, financial ties to countries of concern, and listing on a range of federal restricted entity lists.
Frequently Asked Questions
Is there a Phase I award for this topic?
No. This is a Direct-to-Phase-II topic. Applicants must independently complete and document a Phase I-type feasibility effort before submitting the Phase II proposal.
What is the proposal deadline?
September 23, 2026, submitted electronically through DSIP.
How much funding is available?
Up to $2,000,000 for a Phase II award with a maximum period of performance of 24 months, plus up to $50,000 in additional Technical and Business Assistance funding.
What operating temperature and frequency does DAF require?
Operation at or above 500°C with a minimum frequency of 1MHz and a target of 10MHz at temperature, higher frequency preferred.
What TRL is expected at the start and end of the project?
TRL 3 at the start, meaning proof-of-concept already demonstrated in past work, advancing to TRL 5 by the end of Phase II, meaning component validation in a relevant environment.
Can feasibility work from a prior SBIR or STTR contract count?
No. Feasibility documentation cannot be based on or logically extend from any prior or ongoing federally funded SBIR or STTR work.
Is this topic export controlled?
Yes. It is restricted under both ITAR and the Export Administration Regulations, with disclosure required for any foreign national involvement.
What is the page limit for the technical volume?
35 pages.
Are venture capital or private equity backed companies eligible?
No. This BAA release excludes small businesses majority owned by multiple venture capital operating companies, hedge funds, or private equity funds.
What happens in Phase III?
Phase III would advance the technology to TRL 6 or higher by fabricating a high temperature application specific integrated circuit or microcontroller for a clearly identified DoW application, potentially integrated into a subsystem for further testing. Commercial crossover applications include automotive, aerospace, and oil and gas drilling.