Radiation Hardening of Non-Hardened Commercial Microelectronics - SBIR Topic MDA26BZ04-NV002

Funding Amount:

Phase I - $314,000

Deadline to Apply:

August 19th, 2026

ITAR:

The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws.

Objective:

Develop a process to radiation harden commercial microelectronics that were not originally designed to operate in radiation environments.

Description:

The performance and survivability of Department of War (DoW) and space systems, especially those operating in space environments, are critically affected by radiation.

Radiation testing of parts is a major cost and schedule driver for DoW and space systems.

The market for microelectronics that meet government radiation requirements is small.

Commercial microelectronics could meet the government’s performance requirements while failing to meet its natural space requirements.

Some state-of-the-art processes like Gate All Around (GAA) technologies meet the DoW’s performance and Size, Weight, and Power (SWAP) requirements yet might not meet all of the DoW’s survivability requirements.

MDA seeks a process which utilizes advanced packaging techniques and chiplets to pair fast ‘non-hardened’ components with slower hardened packages together, thereby increasing the rad-hard (radiation hardened) tolerance while maintaining the high performance of non-hardened commercial technologies.

The goal is to target a minimum Single Event Latch-up (SEL) immunity of 75 Linear Energy Transfer (LET) and Total Ionizing Dose (TID) survival of 300 kRad(Si).

This topic will seek to take existing Commercial Off-The-Shelf (COTS) parts/chiplets fabricated using state-of-the-art processes such as sub-16nm FinFETs (Fin Field Effect Transistor) or GAA, modify them or provide a package-on-package-like solution such that their radiation tolerance meets natural space requirements.

This includes solutions based on heterogeneous packaging, where a rad-hard "watchdog" chiplet is integrated to monitor and compensate for radiation-induced errors in the high-performance COTS component.

At a minimum, the final product should meet an SEL immunity requirement of at least 75 LET and must be able to survive at least a 300 kRad TID.

Solutions relying on shielding the part or requiring access at the state-of-the-art foundry to add or change masks are not of interest.

All solutions should start with already fabricated parts either in bare die form or packaged parts.

PHASE I:

Feasibility Study and Proof of Concept:

Develop the proposed approach to a sufficient level to demonstrate its viability and identify requirements for full development.

This should include detailed simulation and modeling of the proposed heterogeneous packaging architecture, showing predicted radiation tolerance improvements and potential performance impacts.

Explore different integration schemes for the hardened and non-hardened chiplets.

Component Selection and Characterization:

Identify suitable COTS components (e.g., FinFETs, Gate All Around (GAA), Fully Depleted Silicon on Insulator (FD-SOI) devices) and chiplets for the heterogeneous packaging approach.

Perform baseline radiation testing on the selected COTS components to quantify their initial radiation tolerance.

Design and Simulation:

Design the initial heterogeneous package, including interconnects, thermal management, and power distribution.

Simulate the radiation response of the packaged system, considering both TID and Single-Event Upset (SEU) effects.

Deliverables:

• Detailed feasibility study report outlining the proposed approach, simulation results, and component selection rationale.

• A preliminary design of the heterogeneous package.

• A test plan for Phase II radiation testing.

PHASE II:

Prototype Development and Fabrication:

Fabricate a prototype heterogeneous package based on the Phase I design.

This may involve collaboration with a packaging vendor or trusted foundry.

Radiation Testing and Optimization:

Conduct comprehensive radiation testing (TID, SEU, SEL, and dose rate) of the fabricated prototype to characterize its radiation tolerance.

Optimize the design and fabrication process based on the test results.

Performance Evaluation:

Evaluate the performance of the heterogeneous package in terms of speed, power consumption, and signal integrity.

Compare the performance to that of the original COTS component.

Integration and Validation:

Integrate the hardened component into a representative space avionic subsystem/system application.

Test in realistic space radiation environments.

PHASE III DUAL USE APPLICATIONS:

Deliverables:

• Fabricated and tested prototype heterogeneous package.

• Detailed radiation test report.

• Performance evaluation report.

Who will win?

If you can achieve the objective above better than any other company on the market, you have a very high-likelihood of success and should apply.

Who is eligible to apply?

Any company that meets the following criteria:

• For-profit company

• U.S.-owned and controlled.

• 500 or fewer employees (including affiliates)

How Can BW&CO Help?

1) End-to-end support including, strategy, writing of the full proposal, and administrative & compliance support.

2) Proposal strategy and review.

3) Administrative & compliance support.

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