High Voltage and Current Silicon-Carbide (SiC) Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET) for Fast Turn-On Current Applications - STTR Topic DON26TZ01-NV019

Disclaimer:
This topic was temporarily posted by the Department of War SBIR Program on March 2nd 2026 and removed the following day.
We believe this topic is planned to be released once the SBIR program is reauthorized; however, this topic may ultimately be modified or withdrawn.

Sign up below to be notified as soon as this topic is released again. In the meantime, we’d recommend you start planning to respond if within your capabilities.

Funding Amount:

Est. $240,000

Deadline to Apply:

Est. April 29th, 2026.

Objective:

Develop state-of-the-art silicon carbide (SiC) Metal-Oxide Semiconductor Field-Effect Transistors (MOSFETs) packaged for improved size, weight, and power (SWaP) for applications where a high-blocking voltage of more than 10 kV, a high pulsed current density of greater than +/- 5 kA (10 kA ideal), and tens of nanoseconds turn-on time, with low-jitter, are needed for integration with high power microwave (HPM) systems.

Description:

The DOW needs SWaP-favorable solutions for fast turn-on and low-jitter SiC MOSFETs to generate high current densities from high voltage capacitors. Current methods of high-current/voltage switching from SiC MOSFETS rely on an array created from series and parallel combinations of commercial off the shelf (COTS) devices [Ref 1]. However, these device arrays are limited in the voltage and amplitude they can switch, have complicated gate driving circuits, and can become size limited. To improve current state-of-the-art capability, the DOW has a need for the development of MOSFETs that have a blocking voltage greater than 10 kV for a single wafer, such that a low-side gate driver can be used to turn on the MOSFET, and a high pulsed-current capability. The requirements for a 5 kA peak current (10 kA ideal) may require multiple parallel combinations of MOSFET wafers, and if so, packaging is to be minimized and vertically stacked packaged arrays should be utilized. It is understood that at higher blocking voltages and current densities an additional diode may be necessary to accommodate the desired pulse current [Ref 2]. Minimizing gate charge and gate resistance for an array of MOSFET is important to alleviate driver requirements, such that a turn on time of less than 30 nanoseconds (ns) is achievable with less than 30 V of gate voltage and 10’s of amps of gate current.

Who will win?

If you can achieve the objective above better than any other company on the market, you have a very high-likelihood of success and should apply.

Who is eligible to apply?

Any company that meets the following criteria:

  • For-profit company

  • U.S.-owned and controlled.

  • 500 or fewer employees (including affiliates)

How Can BW&CO Help?

1) End-to-end support including, strategy, writing of the full proposal, and administrative & compliance support.

2) Proposal strategy and review.

3) Administrative & compliance support.

Request to talk with a member of our team by completing the form below:

Previous
Previous

Auto-Focus Detection Capability for SONAR Systems - SBIR Topic DON26BZ01-NV02

Next
Next

Improved Portable Underway Replenishment (UNREP) Tester/Trainer - SBIR Topic DON26BZ01-NV019